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OpenVMS INTERNALS FOR NON-SYSTEMS PROGRAMMERS
OpenVMS Training Overview

This course presents an in-depth explanation of OpenVMS internals, from a conceptual (and when possible, practical) view. It is designed to educate system managers and other non-systems programmers in the most frequently used parts of the OpenVMS executive. The course also provides the foundations for effective use of the system dump analyzer (SDA).

OpenVMS Training Prerequisites

Participants are assumed to have a thorough knowledge of OpenVMS system management, and some experience with system parameters.

OpenVMS Training Course duration

This course requires three (3) days, 70 % lecture, and 30 % lab time.

OpenVMS Training Course Objectives

Students completing this course will understand: the effect many SYSGEN parameters have on the layout of the OpenVMS executive areas; the basic flow of the most frequently accessed OpenVMS mechanisms; the naming conventions used in the OpenVMS executive areas; and the use of SDA commands in displaying information on executive area

OpenVMS Training Course outline

Naming conventions used in the VMS executive
  • System space locations
  • OpenVMS internal routines
  • Data structure layouts and offset names
Internals of the process
  • P0 address space
  • P1 address space
  • Process control block
  • Process header
  • Hardware process control block
  • Job information block
Systems components overview
  • S0 address space
  • Timer mechanisms
  • SWAPPER, ERRFMT, OPCOM, JOB_CONTROL
  • Process creation
System mechanisms
  • Interrupt priority levels
  • Interrupt handling
  • Exception handling
  • System service dispatching
  • ASTs (Asynchronous system traps)
  • Non-paged dynamic memory layout
  • Mutexes and MWAIT states
  • Lock manager database
Analyzing system crashes (caused by software)
  • SDA utility features
  • Requirements to run SDA
  • Bugcheck mechanism
  • Bugcheck parameters
  • Sample stacks
  • Sample crash dump analysis
Using the DELTA Debugger

Scheduling
  • Overview of scheduling states
  • Scheduling states transitions
  • MWAIT state
  • Wait state queues
  • Computable queues
  • Loading and saving process hardware contex



 
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